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| author | Gerhard Sittig <gerhard.sittig@gmx.net> | 2020-05-02 15:08:41 +0200 |
|---|---|---|
| committer | Gerhard Sittig <gerhard.sittig@gmx.net> | 2020-07-07 20:44:11 +0200 |
| commit | fcf7bf485a886370573c2e40a2eadb95acb3c936 (patch) | |
| tree | 2b1f5e4e9d65c42dfff23de2bd43e34cc1affca4 /decoders/ir_rc5/__init__.py | |
| parent | 0e15a126ec2e2058b4fb35304cb650384900d934 (diff) | |
| download | libsigrokdecode-fcf7bf485a886370573c2e40a2eadb95acb3c936.tar.gz libsigrokdecode-fcf7bf485a886370573c2e40a2eadb95acb3c936.zip | |
sae_j1850_vpw: drop the part which duplicates the timing decoder
The SAE J1850 Variable Pulse Width decoder used to track and annotate
the width of pulses between edges, which duplicates existing features
of the 'timing' decoder. Remove this part from J1850, users can always
connect the input signal to multiple decoders as needed..
Also sort annotation rows while we are here. Top to bottom represents
raw wire bits to highest interpretation layer, as in other decoders.
Diffstat (limited to 'decoders/ir_rc5/__init__.py')
0 files changed, 0 insertions, 0 deletions