diff options
author | Bert Vermeulen <bert@biot.com> | 2013-11-10 12:45:58 +0100 |
---|---|---|
committer | Bert Vermeulen <bert@biot.com> | 2013-11-15 22:30:08 +0100 |
commit | a929afa618be52072786b51f1b9ea7be03edcd49 (patch) | |
tree | e08a43d2901d4c85a9d4edd54a058b512b8cc2c5 /decoders/i2c | |
parent | d75d8a7c40011cdc15be8330b5efbdf812c4fe27 (diff) | |
download | libsigrokdecode-a929afa618be52072786b51f1b9ea7be03edcd49.tar.gz libsigrokdecode-a929afa618be52072786b51f1b9ea7be03edcd49.zip |
Use OUTPUT_BINARY with four classes.
Diffstat (limited to 'decoders/i2c')
-rw-r--r-- | decoders/i2c/pd.py | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/decoders/i2c/pd.py b/decoders/i2c/pd.py index 9f8cbaf..60e9c45 100644 --- a/decoders/i2c/pd.py +++ b/decoders/i2c/pd.py @@ -92,6 +92,12 @@ class Decoder(srd.Decoder): ['Data write', 'Data write'], ['Warnings', 'Human-readable warnings'], ] + binary = ( + 'Address read', + 'Address write', + 'Data read', + 'Data write', + ) def __init__(self, **kwargs): self.samplerate = None @@ -115,6 +121,7 @@ class Decoder(srd.Decoder): def start(self): self.out_proto = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) + self.out_binary = self.add(srd.OUTPUT_BINARY) self.out_bitrate = self.register(srd.OUTPUT_META, meta=(int, 'Bitrate', 'Bitrate from Start bit to Stop bit')) @@ -124,6 +131,9 @@ class Decoder(srd.Decoder): def putp(self, data): self.put(self.startsample, self.samplenum, self.out_proto, data) + def putb(self, data): + self.put(self.startsample, self.samplenum, self.out_binary, data) + def is_start_condition(self, scl, sda): # START condition (S): SDA = falling, SCL = high if (self.oldsda == 1 and sda == 0) and scl == 1: @@ -178,18 +188,24 @@ class Decoder(srd.Decoder): if self.options['address_format'] == 'shifted': d = d >> 1 + bin_class = -1 if self.state == 'FIND ADDRESS' and self.wr == 1: cmd = 'ADDRESS WRITE' + bin_class = 1 elif self.state == 'FIND ADDRESS' and self.wr == 0: cmd = 'ADDRESS READ' + bin_class = 0 elif self.state == 'FIND DATA' and self.wr == 1: cmd = 'DATA WRITE' + bin_class = 3 elif self.state == 'FIND DATA' and self.wr == 0: cmd = 'DATA READ' + bin_class = 2 self.putp([cmd, d]) self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d), '%s: %02X' % (proto[cmd][2], d), '%02X' % d]]) + self.putb((bin_class, bytes([d]))) # Done with this packet. self.startsample = -1 |