sle44xx: rework data bits accumulation, and byte presentation

The 'databyte' is strictly local to the routine when 8 bits were seen.
The 'bitcount' is redundant and becomes obsolete when bits[] is a Python
list. The comment and the code disagreed, the wire is said to communicate
bits in LSB first order, the implemenation kept accumulating bits in the
reverse order (the annotation part, not the data byte math). Prefer the
common helper to convert bits to bytes.

There is uncertainty about the bit width "estimation" logic. The main
loop's .wait() conditions suggest that data bit values are valid for the
period of high CLK, which provides an easier and more robust condition
for annotation boundaries. Add a comment for now. The order of bit and
byte values' annotation emission is unfortunate, too.

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