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author | Gerhard Sittig <gerhard.sittig@gmx.net> | 2020-11-07 13:49:06 +0100 |
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committer | Gerhard Sittig <gerhard.sittig@gmx.net> | 2020-11-11 20:17:45 +0100 |
commit | 4f4e035397fa0770d47bf8b663e87651e0709511 (patch) | |
tree | 3c759357c7e71a7fc0420b835278d7d3cd670c00 /decoders/common/srdhelper/mod.py | |
parent | 76b64d3a64c61f4de996d40c55d44c77471a48d8 (diff) | |
download | libsigrokdecode-4f4e035397fa0770d47bf8b663e87651e0709511.tar.gz libsigrokdecode-4f4e035397fa0770d47bf8b663e87651e0709511.zip |
parallel: rephrase word accumulation after reset introduction
Straighten the accumulation of words from bit chunks that are spread
across several bus cycles (multiplexed transmission). Simplify the PD's
instance variables, keep more state in local vars and explicitly pass
related information to API calls. This also unobfuscates the emission
of annotations and simplifies future maintenance.
Split the accumulation of word data and the emission of its annotation
such that reset related activity can flush accumulated data. Introduce a
warning when word data gets emitted which does not match the configured
word width (early de-assertion of select/enable, or unexpected reset).
Presenting this data and amending it with a warning is considered more
desirable than not seeing the data at all. This does not affect previous
use cases since support for the reset signal was only introduced lately.
Also emit annotations in a more logical order. It's unexpected to see
the resulting word before its last item is seen. Graphical presentation
may not care but automated processing of the decoder output will. This
is the previous order of annotation emission which is surprising and got
fixed in this commit:
3768240-4118229 parallel: item: "3"
3768240-4468218 parallel: word: "33"
4118229-4468218 parallel: item: "3"
4468218-4818202 parallel: item: "3"
4468218-5268189 parallel: word: "32"
4818202-5268189 parallel: item: "2"
5268189-5368185 parallel: item: "2"
5268189-5568180 parallel: word: "28"
5368185-5568180 parallel: item: "8"
5568180-5668176 parallel: item: "0"
5568180-5868171 parallel: word: "08"
5668176-5868171 parallel: item: "8"
5868171-5968166 parallel: item: "0"
5868171-6168162 parallel: word: "01"
5968166-6168162 parallel: item: "1"
6168162-6268157 parallel: item: "0"
6168162-6468152 parallel: word: "0c"
6268157-6468152 parallel: item: "c"
This adjusted emission order won't pass the current test implementation,
but manual inspection of the output reveals that all the expected data
is present and matches previously extracted information:
parallel/hd44780_word_demux/annotation ..................................... Output mismatch
Testcase: parallel/hd44780_word_demux/annotation
Test output mismatch:
+ 4118229-4468218 parallel: item: "3"
- 4118229-4468218 parallel: item: "3"
+ 4818202-5268189 parallel: item: "2"
- 4818202-5268189 parallel: item: "2"
+ 5368185-5568180 parallel: item: "8"
- 5368185-5568180 parallel: item: "8"
+ 5668176-5868171 parallel: item: "8"
- 5668176-5868171 parallel: item: "8"
+ 5968166-6168162 parallel: item: "1"
- 5968166-6168162 parallel: item: "1"
+ 6268157-6468152 parallel: item: "c"
- 6268157-6468152 parallel: item: "c"
Diffstat (limited to 'decoders/common/srdhelper/mod.py')
0 files changed, 0 insertions, 0 deletions