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author | Andrew Gregory <andrew.gregory@gmail.com> | 2018-12-05 23:31:34 +0800 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2019-06-30 22:45:22 +0200 |
commit | d4364948d0356f0659e1777cf771ed5bfc1f2072 (patch) | |
tree | 88f82fe9cb72cca6c97d0f7ea6cdbb6043247beb /decoders/am230x/pd.py | |
parent | 1c308e3d0f95fa484e1d89ca2d9cd01cb3293027 (diff) | |
download | libsigrokdecode-d4364948d0356f0659e1777cf771ed5bfc1f2072.tar.gz libsigrokdecode-d4364948d0356f0659e1777cf771ed5bfc1f2072.zip |
modbus: Make C->S and S->C configurable, add framegap option.
Change client->server and server->client to be separately configurable,
allowing decoding at both the server (where client->server is RX and
server->client is TX) and client (where client->server is TX and
server->client is RX) ends of the link. It also allows monitoring of the
bus on a single channel (where client->server and server->client are both
RX (or TX)).
When I tried to decode a bus capture, I found that when the transmitter was
turned off it generated a false start bit, which in turn resulted in a false
trailing byte from the UART decoder. This narrowed the inter-frame gap to
the point where the Modbus decoder failed to recognise a new frame. The
result was only the first frame of the capture decoded - all the rest of the
frames failed to decode. I had to reduce the frame gap to allow subsequent
frames to decode, and so made it a configurable option that defaults to the
existing gap.
Lastly, I fixed a call to puti() that incorrectly included the annotation
prefix.
Diffstat (limited to 'decoders/am230x/pd.py')
0 files changed, 0 insertions, 0 deletions