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author | Uwe Hermann <uwe@hermann-uwe.de> | 2017-06-15 23:34:56 +0200 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2017-06-16 12:48:39 +0200 |
commit | d399c64172cdf99637b63b01d2af1e509ed6b059 (patch) | |
tree | d994c33aea09f228c3e47e03c45050733e699d25 | |
parent | e992ae3a525cbc0d6441bdf102dae347f1ccf6d0 (diff) | |
download | libsigrokdecode-d399c64172cdf99637b63b01d2af1e509ed6b059.tar.gz libsigrokdecode-d399c64172cdf99637b63b01d2af1e509ed6b059.zip |
spi: Simplify some code chunks.
-rw-r--r-- | decoders/spi/pd.py | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/decoders/spi/pd.py b/decoders/spi/pd.py index b08b8a8..7b979f0 100644 --- a/decoders/spi/pd.py +++ b/decoders/spi/pd.py @@ -207,17 +207,18 @@ class Decoder(srd.Decoder): not self.cs_asserted(cs) if self.have_cs else False ws = self.options['wordsize'] + bo = self.options['bitorder'] # Receive MISO bit into our shift register. if self.have_miso: - if self.options['bitorder'] == 'msb-first': + if bo == 'msb-first': self.misodata |= miso << (ws - 1 - self.bitcount) else: self.misodata |= miso << self.bitcount # Receive MOSI bit into our shift register. if self.have_mosi: - if self.options['bitorder'] == 'msb-first': + if bo == 'msb-first': self.mosidata |= mosi << (ws - 1 - self.bitcount) else: self.mosidata |= mosi << self.bitcount @@ -252,7 +253,7 @@ class Decoder(srd.Decoder): if self.samplerate is not None: elapsed = 1 / float(self.samplerate) elapsed *= (self.samplenum - self.ss_block + 1) - bitrate = int(1 / elapsed * self.options['wordsize']) + bitrate = int(1 / elapsed * ws) self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate) if self.have_cs and self.cs_was_deasserted: @@ -326,12 +327,9 @@ class Decoder(srd.Decoder): # process the very first sample before checking for edges. The # previous implementation did this by seeding old values with # None, which led to an immediate "change" in comparison. - pins = self.wait({}) - (clk, miso, mosi, cs) = pins + (clk, miso, mosi, cs) = self.wait({}) self.find_clk_edge(miso, mosi, clk, cs, True) while True: - # Ignore identical samples early on (for performance reasons). - pins = self.wait(wait_cond) - (clk, miso, mosi, cs) = pins + (clk, miso, mosi, cs) = self.wait(wait_cond) self.find_clk_edge(miso, mosi, clk, cs, False) |