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| author | Gerhard Sittig <gerhard.sittig@gmx.net> | 2017-03-17 20:28:59 +0100 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2017-06-21 17:45:15 +0200 |
| commit | 730e07bca67df0ca9f7a4e68dff87d91d0316be9 (patch) | |
| tree | 817367fe5657cbb727c75af2de6b9743ba5033f1 | |
| parent | ce7018ca10f6c81f16e29db1e05a99192ce671d4 (diff) | |
| download | libsigrokdecode-730e07bca67df0ca9f7a4e68dff87d91d0316be9.tar.gz libsigrokdecode-730e07bca67df0ca9f7a4e68dff87d91d0316be9.zip | |
onewire_network: Fixup start samplenumber for annotations
Annotations generated by the onewire_network decoder started where bit 1
began, while it should align with the start of bit 0.
| -rw-r--r-- | decoders/onewire_network/pd.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/decoders/onewire_network/pd.py b/decoders/onewire_network/pd.py index a24cb16..323da0b 100644 --- a/decoders/onewire_network/pd.py +++ b/decoders/onewire_network/pd.py @@ -129,7 +129,7 @@ class Decoder(srd.Decoder): # Data collector. def onewire_collect(self, length, val, ss, es): # Storing the sample this sequence begins with. - if self.bit_cnt == 1: + if self.bit_cnt == 0: self.ss_block = ss self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt) self.bit_cnt += 1 |