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authorUwe Hermann <uwe@hermann-uwe.de>2012-11-21 22:51:31 +0100
committerUwe Hermann <uwe@hermann-uwe.de>2012-11-24 20:21:20 +0100
commit0eeeb544e1ea3cef9669f98e7c0b19b8f73a9236 (patch)
treece51bc009dbc48b130ff1280e1ef902f4cf4e4a3
parent24c74fd30fb161837c5f8b01baf3c0fe2dfa4ed5 (diff)
downloadlibsigrokdecode-0eeeb544e1ea3cef9669f98e7c0b19b8f73a9236.tar.gz
libsigrokdecode-0eeeb544e1ea3cef9669f98e7c0b19b8f73a9236.zip
Fix bugs in "Invalid state" printing/exceptions.
-rw-r--r--decoders/dcf77/pd.py2
-rw-r--r--decoders/i2c/pd.py2
-rw-r--r--decoders/mlx90614/pd.py2
-rw-r--r--decoders/mxc6225xu/pd.py2
-rw-r--r--decoders/rtc8564/pd.py2
-rw-r--r--decoders/uart/pd.py2
6 files changed, 6 insertions, 6 deletions
diff --git a/decoders/dcf77/pd.py b/decoders/dcf77/pd.py
index c4132e9..9b7c931 100644
--- a/decoders/dcf77/pd.py
+++ b/decoders/dcf77/pd.py
@@ -282,7 +282,7 @@ class Decoder(srd.Decoder):
self.state = 'WAIT FOR RISING EDGE'
else:
- raise Exception('Invalid state: %d' % self.state)
+ raise Exception('Invalid state: %s' % self.state)
self.oldval = val
diff --git a/decoders/i2c/pd.py b/decoders/i2c/pd.py
index 53321eb..40baf44 100644
--- a/decoders/i2c/pd.py
+++ b/decoders/i2c/pd.py
@@ -232,7 +232,7 @@ class Decoder(srd.Decoder):
if self.is_data_bit(scl, sda):
self.get_ack(scl, sda)
else:
- raise Exception('Invalid state %d' % self.STATE)
+ raise Exception('Invalid state: %s' % self.state)
# Save current SDA/SCL values for the next round.
self.oldscl = scl
diff --git a/decoders/mlx90614/pd.py b/decoders/mlx90614/pd.py
index 1ee88d7..329f2b6 100644
--- a/decoders/mlx90614/pd.py
+++ b/decoders/mlx90614/pd.py
@@ -83,5 +83,5 @@ class Decoder(srd.Decoder):
self.state = 'IGNORE START REPEAT'
self.data = []
else:
- raise Exception('Invalid state: %d' % self.state)
+ raise Exception('Invalid state: %s' % self.state)
diff --git a/decoders/mxc6225xu/pd.py b/decoders/mxc6225xu/pd.py
index 39564a9..c139918 100644
--- a/decoders/mxc6225xu/pd.py
+++ b/decoders/mxc6225xu/pd.py
@@ -225,5 +225,5 @@ class Decoder(srd.Decoder):
else:
pass # TODO?
else:
- raise Exception('Invalid state: %d' % self.state)
+ raise Exception('Invalid state: %s' % self.state)
diff --git a/decoders/rtc8564/pd.py b/decoders/rtc8564/pd.py
index bf5d4b6..a2d8a1a 100644
--- a/decoders/rtc8564/pd.py
+++ b/decoders/rtc8564/pd.py
@@ -212,5 +212,5 @@ class Decoder(srd.Decoder):
else:
pass # TODO?
else:
- raise Exception('Invalid state: %d' % self.state)
+ raise Exception('Invalid state: %s' % self.state)
diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index 24551da..83552ce 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -297,7 +297,7 @@ class Decoder(srd.Decoder):
elif self.state[rxtx] == 'GET STOP BITS':
self.get_stop_bits(rxtx, signal)
else:
- raise Exception('Invalid state: %d' % self.state[rxtx])
+ raise Exception('Invalid state: %s' % self.state[rxtx])
# Save current RX/TX values for the next round.
self.oldbit[rxtx] = signal