summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2019-04-15 19:40:55 +0200
committerUwe Hermann <uwe@hermann-uwe.de>2019-04-15 19:40:55 +0200
commit8f461b610c0887db253dc289471beeb1da6f08ea (patch)
treed61ff4c191e015d625533f949bb017afae861455
parentdab5420eca0c5d217e8a41a53888c609dd70321b (diff)
downloadlibsigrokdecode-8f461b610c0887db253dc289471beeb1da6f08ea.tar.gz
libsigrokdecode-8f461b610c0887db253dc289471beeb1da6f08ea.zip
sdcard_spi: handle_data_response(): Add comment, cosmetics.
-rw-r--r--decoders/sdcard_spi/pd.py16
1 files changed, 13 insertions, 3 deletions
diff --git a/decoders/sdcard_spi/pd.py b/decoders/sdcard_spi/pd.py
index 5054d9e..1e02756 100644
--- a/decoders/sdcard_spi/pd.py
+++ b/decoders/sdcard_spi/pd.py
@@ -382,20 +382,30 @@ class Decoder(srd.Decoder):
self.cmd24_start_token_found = True
def handle_data_response(self, miso):
+ # Data Response token (1 byte).
+ #
+ # Format:
+ # - Bits[7:5]: Don't care.
+ # - Bits[4:4]: Always 0.
+ # - Bits[3:1]: Status.
+ # - 010: Data accepted.
+ # - 101: Data rejected due to a CRC error.
+ # - 110: Data rejected due to a write error.
+ # - Bits[0:0]: Always 1.
miso &= 0x1f
if miso & 0x11 != 0x01:
# This is not the byte we are waiting for.
# Should we return to IDLE here?
return
- self.put(self.miso_bits[7][1], self.miso_bits[5][2], self.out_ann, [134, ['don\'t care']])
- self.put(self.miso_bits[4][1], self.miso_bits[4][2], self.out_ann, [134, ['0']])
+ self.put(self.miso_bits[7][1], self.miso_bits[5][2], self.out_ann, [134, ['Don\'t care']])
+ self.put(self.miso_bits[4][1], self.miso_bits[4][2], self.out_ann, [134, ['Always 0']])
if miso == 0x05:
self.put(self.miso_bits[3][1], self.miso_bits[1][2], self.out_ann, [134, ['Data accepted']])
elif miso == 0x0b:
self.put(self.miso_bits[3][1], self.miso_bits[1][2], self.out_ann, [134, ['Data rejected (CRC error)']])
elif miso == 0x0d:
self.put(self.miso_bits[3][1], self.miso_bits[1][2], self.out_ann, [134, ['Data rejected (write error)']])
- self.put(self.miso_bits[0][1], self.miso_bits[0][2], self.out_ann, [134, ['1']])
+ self.put(self.miso_bits[0][1], self.miso_bits[0][2], self.out_ann, [134, ['Always 1']])
ann_class = None
if self.is_cmd24:
ann_class = 24