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test incremental_8ch_short_noclock
protocol-decoder parallel channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7
input misc/demo/incremental_8ch_short.sr
output parallel annotation match incremental_8ch_short_noclock.output
test incremental_8ch_short_clock
protocol-decoder parallel channel clk=0 channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7
input misc/demo/incremental_8ch_short.sr
output parallel annotation match incremental_8ch_short_clock.output
test incremental_8ch_long_noclock
protocol-decoder parallel channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7
input misc/demo/incremental_8ch_long.sr
output parallel annotation match incremental_8ch_long_noclock.output
test incremental_8ch_long_clock
protocol-decoder parallel channel clk=0 channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7
input misc/demo/incremental_8ch_long.sr
output parallel annotation match incremental_8ch_long_clock.output
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