From 3c35aaa05492cfa60c9482634987b50c5b7b2d38 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 21 Oct 2018 18:12:41 +0200 Subject: spiflash: Updates due to recent PD chages. --- decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output | 1 + 1 file changed, 1 insertion(+) (limited to 'decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output') diff --git a/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output b/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output index 50f9f85..4186414 100644 --- a/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output +++ b/decoder/test/spiflash/winbond_w25q80dv_ce_without_wren.output @@ -7,3 +7,4 @@ Status register writes are allowed. " 28-45 spiflash: field: "Status register" 8-45 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" +66-84 spiflash: ce: "Command: Chip erase (CE)" "Command: Chip erase" "Cmd: Chip erase" "Cmd: CE" "CE" -- cgit v1.2.3-70-g09d2