From bc73a3aacf2441824e0135225f038efc467de53d Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Tue, 18 Aug 2015 00:07:50 +0200 Subject: mrf24j40: Add a few test-cases. --- decoder/test/mrf24j40/mrf24j40-reset-wakeup.output | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 decoder/test/mrf24j40/mrf24j40-reset-wakeup.output (limited to 'decoder/test/mrf24j40/mrf24j40-reset-wakeup.output') diff --git a/decoder/test/mrf24j40/mrf24j40-reset-wakeup.output b/decoder/test/mrf24j40/mrf24j40-reset-wakeup.output new file mode 100644 index 0000000..b9b807c --- /dev/null +++ b/decoder/test/mrf24j40/mrf24j40-reset-wakeup.output @@ -0,0 +1,30 @@ +3669-3743 mrf24j40: swrite: "SOFTRST: 0x7" +3813-3888 mrf24j40: sread: "SOFTRST: 0x0" +3968-4044 mrf24j40: swrite: "PACON2: 0x98" +4114-4189 mrf24j40: swrite: "TXSTBL: 0x95" +4260-4390 mrf24j40: lwrite: "RFCON0: 0x3" +4461-4590 mrf24j40: lwrite: "RFCON1: 0x1" +4661-4789 mrf24j40: lwrite: "RFCON2: 0x80" +4861-4991 mrf24j40: lwrite: "RFCON6: 0x90" +5062-5191 mrf24j40: lwrite: "RFCON7: 0x80" +5262-5390 mrf24j40: lwrite: "RFCON8: 0x10" +5463-5592 mrf24j40: lwrite: "SLPCON1: 0x21" +5662-5736 mrf24j40: swrite: "BBREG2: 0x80" +5808-5883 mrf24j40: swrite: "CCAEDTH: 0x60" +5953-6029 mrf24j40: swrite: "BBREG6: 0x40" +6100-6174 mrf24j40: swrite: "INTCON: 0xf6" +6248-6376 mrf24j40: lwrite: "RFCON0: 0x13" +6448-6523 mrf24j40: swrite: "RFCTL: 0x4" +6593-6667 mrf24j40: swrite: "RFCTL: 0x0" +7763-7839 mrf24j40: sread: "WAKECON: 0x0" +7911-7986 mrf24j40: swrite: "WAKECON: 0x80" +8055-8130 mrf24j40: sread: "SOFTRST: 0x0" +8203-8278 mrf24j40: swrite: "SOFTRST: 0x4" +8346-8422 mrf24j40: sread: "SLPACK: 0x0" +8496-8571 mrf24j40: swrite: "SLPACK: 0x80" +8646-8720 mrf24j40: swrite: "PANIDH: 0xca" +8794-8869 mrf24j40: swrite: "PANIDL: 0xfe" +8941-9016 mrf24j40: sread: "PANIDH: 0xca" +9086-9162 mrf24j40: sread: "PANIDL: 0xfe" +47051-47126 mrf24j40: swrite: "SADRH: 0x11" +47198-47272 mrf24j40: swrite: "SADRL: 0x11" -- cgit v1.2.3-54-g00ecf