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Catch up with the implementation of the "parallel" decoder, which now
flushes previously accumulated information when the end of input data
is seen. Which completes the last "item" (data pattern on the bus), and
may complete another "word" (data value that spans several bus cycles).
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Catch up with the parallel decoder's implementation. Documented Python
output includes the bus width and cycle count for items and words.
[ see a word-diff for the commit's essence ]
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The parallel decoder can also be used to interpret SQI communication.
Using the chip select as the reset/enable signal increases robustness.
Implement a test case to cover this recently added decoder feature.
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Catch up with the "parallel" decoder's implementation. Annotations for
demultiplexed words are sent after all their individual bits were seen.
Data content remains identical, this is exclusively about emission order.
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The parallel decoder got adjusted to emit annotations for "items" and
"words" in a unified format (consistent width, leading zeroes). Adjust
the test expectation to match the PD implementation.
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Adapt all tests that require it to use the old behaviour of assuming an
initial pin value of 0 (or whatever was previously hardcoded in the PD).
for now (this will likely see some changes later).
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