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path: root/decoder/test/spiflash/winbond_w25q80dv_chip_erase_and_writes_start.output
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Diffstat (limited to 'decoder/test/spiflash/winbond_w25q80dv_chip_erase_and_writes_start.output')
-rw-r--r--decoder/test/spiflash/winbond_w25q80dv_chip_erase_and_writes_start.output1
1 files changed, 1 insertions, 0 deletions
diff --git a/decoder/test/spiflash/winbond_w25q80dv_chip_erase_and_writes_start.output b/decoder/test/spiflash/winbond_w25q80dv_chip_erase_and_writes_start.output
index 436b0a7..701f126 100644
--- a/decoder/test/spiflash/winbond_w25q80dv_chip_erase_and_writes_start.output
+++ b/decoder/test/spiflash/winbond_w25q80dv_chip_erase_and_writes_start.output
@@ -31,6 +31,7 @@ Status register writes are allowed.
"
631-648 spiflash: field: "Status register"
611-648 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
+669-687 spiflash: ce: "Command: Chip erase (CE)" "Command: Chip erase" "Cmd: Chip erase" "Cmd: CE" "CE"
712-729 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR"
733-750 spiflash: bit: "Write operation in progress.
Internal write enable latch is set.