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authorGerhard Sittig <gerhard.sittig@gmx.net>2019-12-22 11:32:28 +0100
committerUwe Hermann <uwe@hermann-uwe.de>2020-01-04 22:44:35 +0100
commit12ae903fee6b3fb40832fceb854ef005e95d0473 (patch)
treed510fe0f7205e870eb6be3555aeb0746c582fe06 /decoder/test/em4305/em4305_write.output
parent28602d4bd0b03ede108b0a12345c34afab6eb62e (diff)
downloadsigrok-test-12ae903fee6b3fb40832fceb854ef005e95d0473.tar.gz
sigrok-test-12ae903fee6b3fb40832fceb854ef005e95d0473.zip
ps2: adjust to recent implementation, stop ends at rising clock edge
Catch up with a recent change in the PS/2 decoder implementation. End the STOP bit at the rising CLOCK edge already, don't expect a clock inhibit phase after a data byte got transmitted.
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