From 1b4691d8eb4e8ef82c995d205c5025647782c89d Mon Sep 17 00:00:00 2001 From: Matt Ranostay Date: Tue, 5 Mar 2013 20:53:53 -0800 Subject: Added MAX6921 shift register signal dumps. MAX6921 signal dump that is from a prototype nixie clock design for the AM335x-based Beaglebone. Signed-off-by: Matt Ranostay --- vfd/max6921/README | 65 ++++++++++++++++++++++++++++++++++++++ vfd/max6921/max6921_data_10mhz.sr | Bin 0 -> 1199 bytes 2 files changed, 65 insertions(+) create mode 100644 vfd/max6921/README create mode 100644 vfd/max6921/max6921_data_10mhz.sr (limited to 'vfd') diff --git a/vfd/max6921/README b/vfd/max6921/README new file mode 100644 index 0000000..a71a3fa --- /dev/null +++ b/vfd/max6921/README @@ -0,0 +1,65 @@ +------------------------------------------------------------------------------- +MAX6921 Shift Register +------------------------------------------------------------------------------- + +This is a capture of data output to a MAX6921 high voltage shift register that +was outputting data for a VFD clock. + +The signals were grabbed on a 28-pin PLCC chip (MAX6921) which outputs 20-bits +that is crafted as a design for VFD applications. + +Logic analyzer setup +-------------------- + +The logic analyzer used was Open Bench Logic Sniffer (at 10Mhz): + + Probe MAX6921 Pin + -------------------------- + 0 LOAD + 1 DATA + 2 CLK + 3 BLANK (PWM Brightness Control) + +Data +---- + +The data contain various values for the VFD being driven, as reference at the +prototype Nixie Cape for the Beaglebone. + + Digit Bit + -------------------------- + 0 1<<12 + 1 1<<19 + 2 1<<13 + 3 1<<18 + 4 1<<14 + 5 1<<17 + 6 1<<16 + 7 1<<15 + 8 1<<15 + 9 1<<11 + + Segment Bit + --------------------------- + SEG_A 1<<0 + SEG_B 1<<1 + SEG_C 1<<2 + SEG_D 1<<3 + SEG_E 1<<4 + SEG_F 1<<5 + SEG_G 1<<6 + SEG_H 1<<7 + + +References: +----------- + + * BeagleBoard.org Vendor Tree (https://github.com/beagleboard/kernel) + * Beagle Nixie GitHub (https://github.com/mranostay/beagle-nixie/) + * MAX6921 Datasheet (http://datasheets.maximintegrated.com/en/ds/MAX6921-MAX6931.pdf) + +The sigrok command line used was: + + sigrok-cli --driver=ols:conn=/dev/ttyACM0 -d samplerate=10mhz \ + -samples=24576 -p 0=LOAD,1=DATA,2=CLK,3=BLANK -o max6921_data_10mhz.sr + diff --git a/vfd/max6921/max6921_data_10mhz.sr b/vfd/max6921/max6921_data_10mhz.sr new file mode 100644 index 0000000..25b4500 Binary files /dev/null and b/vfd/max6921/max6921_data_10mhz.sr differ -- cgit v1.2.3-54-g00ecf