From b3dc55b2f391ac8749f97fc959e8bc257f9ed61c Mon Sep 17 00:00:00 2001 From: bvernoux Date: Sun, 23 Oct 2016 20:22:52 +0200 Subject: spiflash: Add QuadSPI flash example/dump. --- spi/spiflash/fidelix_fm25q32/quadspi/README | 30 +++++++++++++++++++++ ...sp32_02_blink_bootflash_quadspiflash_fm25q32.sr | Bin 0 -> 638808 bytes 2 files changed, 30 insertions(+) create mode 100644 spi/spiflash/fidelix_fm25q32/quadspi/README create mode 100644 spi/spiflash/fidelix_fm25q32/quadspi/esp32_02_blink_bootflash_quadspiflash_fm25q32.sr (limited to 'spi') diff --git a/spi/spiflash/fidelix_fm25q32/quadspi/README b/spi/spiflash/fidelix_fm25q32/quadspi/README new file mode 100644 index 0000000..69c5f29 --- /dev/null +++ b/spi/spiflash/fidelix_fm25q32/quadspi/README @@ -0,0 +1,30 @@ +------------------------------------------------------------------------------- +FIDELIX FM25Q32 +------------------------------------------------------------------------------- + +This is a set of example captures of a FIDELIX FM25Q32 SPI flash chip +(32MBit == 4Mbyte) that is read by ESP32. + +First part is the 2nd-stage bootloader loaded from SPI flash (using +QuadSPI @ 10MHz). Then the 2nd-stage bootloader loads 02_blink (from SPI +flash to SRAM) and executes it. + +The SPI hardware used is ESP32 DevKitC (from ESPRESSIF). + +Details: +https://espressif.com/sites/default/files/documentation/esp32-devkitc_getting_started_guide_en.pdf + + +Logic analyzer setup +-------------------- + +The logic analyzer used was a DreamSourceLab DSLogic (at 100MHz): + + Probe FM25Q32 pin + ----------------------- + 0 CS + 1 CLK + 2 IO0 + 3 IO1 + 4 IO2 + 5 IO3 diff --git a/spi/spiflash/fidelix_fm25q32/quadspi/esp32_02_blink_bootflash_quadspiflash_fm25q32.sr b/spi/spiflash/fidelix_fm25q32/quadspi/esp32_02_blink_bootflash_quadspiflash_fm25q32.sr new file mode 100644 index 0000000..95deaa5 Binary files /dev/null and b/spi/spiflash/fidelix_fm25q32/quadspi/esp32_02_blink_bootflash_quadspiflash_fm25q32.sr differ -- cgit v1.2.3-54-g00ecf