From 047542b95e306abf79083fb48edfa25d1884a13c Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Wed, 10 May 2017 15:00:10 +0000 Subject: spi/ade7758: examples without CS pin A short example of IRQ triggered SPI operation of the ADE7758 energy measurement chip, showing it's use of spi mode 0,1 without a chip select pin. Signed-off-by: Karl Palsson --- spi/ade7758/README | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 spi/ade7758/README (limited to 'spi/ade7758/README') diff --git a/spi/ade7758/README b/spi/ade7758/README new file mode 100644 index 0000000..2b491fe --- /dev/null +++ b/spi/ade7758/README @@ -0,0 +1,21 @@ +50MHz capture of an ADE7758 SPI communications. +Note that Chip Select is _optional_ on this device, provided that you are +careful to only use valid, full length spi read/write requests. + +In this case, the chip is configured to provide interrupts on voltage zero +crossings, and the host MCU is reading the status register, and then the +appropriate (phase B) voltage/current registers. + +It is largely an example of SPI without CS, in spi mode 0,1. + +Two captures are provided. +ade7758-phaseB-zx-irq-context.sr: trigger with precapture on the IRQ pin falling edge. +ade7758-phaseB-zx-irq-nocontext.sr: trigger on spi CLK rising edge. + +Correct decodings with the ADE7758 decoder should show +RSTATUS: 0x400 +FREQ: 0x0 (frequency is from phase A, not connected on this device) +BVRMS: 0x10cd0c (context) or 0x10ccfa (nocontext) +BIRMS: 0x2ac (context) or 0x2a8 (nocontext) + +Anything else has gotten the SPI decoding wrong due to the lack of chip select. -- cgit v1.2.3-70-g09d2