From 6a15597a7b3f901b566b7bfc8c484a14e0fb6a11 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 13 Apr 2014 19:57:43 +0200 Subject: Rename 'probe' to 'channel' everywhere. Variables of type 'struct srd_channel *' are consistently named 'pdch' to make them easily distinguishable from libsigrok's 'struct sr_channel *' variables that are consistently named 'ch'. --- type_logic.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'type_logic.c') diff --git a/type_logic.c b/type_logic.c index 367ff1d..4367680 100644 --- a/type_logic.c +++ b/type_logic.c @@ -45,16 +45,16 @@ static PyObject *srd_logic_iternext(PyObject *self) * and 0x00 values, so the PD doesn't need to do any bitshifting. */ sample_pos = logic->inbuf + logic->itercnt * logic->di->data_unitsize; - for (i = 0; i < logic->di->dec_num_probes; i++) { - /* A probemap value of -1 means "unused optional probe". */ - if (logic->di->dec_probemap[i] == -1) { - /* Value of unused probe is 0xff, instead of 0 or 1. */ - logic->di->probe_samples[i] = 0xff; + for (i = 0; i < logic->di->dec_num_channels; i++) { + /* A channelmap value of -1 means "unused optional channel". */ + if (logic->di->dec_channelmap[i] == -1) { + /* Value of unused channel is 0xff, instead of 0 or 1. */ + logic->di->channel_samples[i] = 0xff; } else { - byte_offset = logic->di->dec_probemap[i] / 8; - bit_offset = logic->di->dec_probemap[i] % 8; + byte_offset = logic->di->dec_channelmap[i] / 8; + bit_offset = logic->di->dec_channelmap[i] % 8; sample = *(sample_pos + byte_offset) & (1 << bit_offset) ? 1 : 0; - logic->di->probe_samples[i] = sample; + logic->di->channel_samples[i] = sample; } } @@ -63,8 +63,8 @@ static PyObject *srd_logic_iternext(PyObject *self) PyLong_FromUnsignedLongLong(logic->start_samplenum + logic->itercnt); PyList_SetItem(logic->sample, 0, py_samplenum); - py_samples = PyBytes_FromStringAndSize((const char *)logic->di->probe_samples, - logic->di->dec_num_probes); + py_samples = PyBytes_FromStringAndSize((const char *)logic->di->channel_samples, + logic->di->dec_num_channels); PyList_SetItem(logic->sample, 1, py_samples); Py_INCREF(logic->sample); logic->itercnt++; -- cgit v1.2.3-70-g09d2