From 2a295b87d7f7f9fc8121b9ff61dd3ea430aa5567 Mon Sep 17 00:00:00 2001 From: Gerhard Sittig Date: Sat, 22 Feb 2020 09:38:32 +0100 Subject: irmp: silence core logic ANALYZE output from the shared library Workaround the default verbosity level of the IRMP core logic for PC library build configurations. Silence the ANALYZE related output. --- irmp/irmp-main-sharedlib.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'irmp') diff --git a/irmp/irmp-main-sharedlib.c b/irmp/irmp-main-sharedlib.c index baa65c9..570df95 100644 --- a/irmp/irmp-main-sharedlib.c +++ b/irmp/irmp-main-sharedlib.c @@ -111,6 +111,19 @@ IRMP_DLLEXPORT void irmp_reset_state(void) s_startBitSample = 0; s_curSample = 0; s_end_sample = 0; + + /* + * TODO This is not the most appropriate location to control the + * core logic's verbosity. But out of the public set of library + * routines this call is closest to some initialization routine. + * The query for compile time parameter values is optional, the + * state reset is not. Multiple verbosity setup activities in + * the same program lifetime won't harm. This HACK is clearly + * preferrable over more fiddling with core logic innards, or + * the introduction of yet another DLL routine. + */ + silent = 1; + verbose = 0; } IRMP_DLLEXPORT int irmp_add_one_sample(int sample) -- cgit v1.2.3-70-g09d2