From 96a044da40fd33e6f3273f0052fdd12f54770150 Mon Sep 17 00:00:00 2001
From: Daniel Thompson <daniel@redfelineninja.org.uk>
Date: Fri, 22 Jan 2016 08:29:09 +0000
Subject: uart: Optimize handling of samples when tx and rx are both idle
Re-enable the fast path for identical samples but only when both
pins are waiting for the start bit. For sparse data sets (I tested
UT61E capture log) the optimization results in a >4x decode
improvement.
---
decoders/uart/pd.py | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
(limited to 'decoders')
diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index d42a5d4..db1065d 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -138,6 +138,7 @@ class Decoder(srd.Decoder):
('tx', 'TX dump'),
('rxtx', 'RX/TX dump'),
)
+ idle_state = ['WAIT FOR START BIT', 'WAIT FOR START BIT']
def putx(self, rxtx, data):
s, halfbit = self.startsample[rxtx], self.bit_width / 2.0
@@ -171,7 +172,7 @@ class Decoder(srd.Decoder):
self.startsample = [-1, -1]
self.state = ['WAIT FOR START BIT', 'WAIT FOR START BIT']
self.oldbit = [1, 1]
- self.oldpins = [1, 1]
+ self.oldpins = [-1, -1]
self.databits = [[], []]
def start(self):
@@ -338,10 +339,12 @@ class Decoder(srd.Decoder):
raise SamplerateError('Cannot decode without samplerate.')
for (self.samplenum, pins) in data:
- # Note: Ignoring identical samples here for performance reasons
- # is not possible for this PD, at least not in the current state.
- # if self.oldpins == pins:
- # continue
+ # We want to skip identical samples for performance reasons but,
+ # for now, we can only do that when we are in the idle state
+ # (meaning both channels are waiting for the start bit).
+ if self.state == self.idle_state and self.oldpins == pins:
+ continue
+
self.oldpins, (rx, tx) = pins, pins
if self.options['invert_rx'] == 'yes':
--
cgit v1.2.3-70-g09d2