From 6a15597a7b3f901b566b7bfc8c484a14e0fb6a11 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 13 Apr 2014 19:57:43 +0200 Subject: Rename 'probe' to 'channel' everywhere. Variables of type 'struct srd_channel *' are consistently named 'pdch' to make them easily distinguishable from libsigrok's 'struct sr_channel *' variables that are consistently named 'ch'. --- decoders/z80/pd.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'decoders/z80') diff --git a/decoders/z80/pd.py b/decoders/z80/pd.py index f6bafb1..299a20e 100644 --- a/decoders/z80/pd.py +++ b/decoders/z80/pd.py @@ -56,7 +56,7 @@ ann_data_cycle_map = { def reduce_bus(bus): if 0xFF in bus: - return None # unassigned bus probes + return None # unassigned bus channels else: return reduce(lambda a, b: (a << 1) | b, reversed(bus)) @@ -72,7 +72,7 @@ class Decoder(srd.Decoder): license = 'gplv3+' inputs = ['logic'] outputs = ['z80'] - probes = tuple({ + channels = tuple({ 'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data bus line %d' % i @@ -82,7 +82,7 @@ class Decoder(srd.Decoder): {'id': 'rd', 'name': '/RD', 'desc': 'Memory or I/O read'}, {'id': 'wr', 'name': '/WR', 'desc': 'Memory or I/O write'}, ) - optional_probes = ( + optional_channels = ( {'id': 'mreq', 'name': '/MREQ', 'desc': 'Memory request'}, {'id': 'iorq', 'name': '/IORQ', 'desc': 'I/O request'}, ) + tuple({ -- cgit v1.2.3-70-g09d2