From b3a0347a805b1bb40773faa5d45ef160e74d8e33 Mon Sep 17 00:00:00 2001 From: Soeren Apel Date: Thu, 30 Jul 2020 21:42:41 +0200 Subject: lfast/sipi: Fix typo --- decoders/sipi/__init__.py | 2 +- decoders/sipi/pd.py | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) (limited to 'decoders/sipi') diff --git a/decoders/sipi/__init__.py b/decoders/sipi/__init__.py index 0c268a1..d62e3c1 100644 --- a/decoders/sipi/__init__.py +++ b/decoders/sipi/__init__.py @@ -19,7 +19,7 @@ ''' The Serial Inter-Processor Interface (SIPI) is a higher-level protocol that runs -over the LFAST physical interface. Together, they form the NXP ZipWire interface. +over the LFAST physical interface. Together, they form the NXP Zipwire interface. The SIPI interface is also provided by Infineon as HSST, using HSCT for transport. diff --git a/decoders/sipi/pd.py b/decoders/sipi/pd.py index 73c5eb9..5bd58fb 100644 --- a/decoders/sipi/pd.py +++ b/decoders/sipi/pd.py @@ -51,16 +51,15 @@ command_codes = { } - ann_header_tag, ann_header_cmd, ann_header_ch, ann_address, ann_data, \ ann_crc, ann_warning = range(7) class Decoder(srd.Decoder): api_version = 3 id = 'sipi' - name = 'SIPI (ZipWire)' + name = 'SIPI (Zipwire)' longname = 'NXP SIPI interface' - desc = 'Serial Inter-Processor Interface (SIPI) aka ZipWire, aka HSSL' + desc = 'Serial Inter-Processor Interface (SIPI) aka Zipwire, aka HSSL' license = 'gplv2+' inputs = ['lfast'] outputs = [] -- cgit v1.2.3-70-g09d2