From 1fd698dcf076c62e53e089be50572efae6b68f15 Mon Sep 17 00:00:00 2001
From: Uwe Hermann <uwe@hermann-uwe.de>
Date: Sat, 28 Jul 2012 17:39:38 +0200
Subject: srd: avr_isp: Improve Chip Erase handling.
---
decoders/avr_isp/pd.py | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
(limited to 'decoders/avr_isp')
diff --git a/decoders/avr_isp/pd.py b/decoders/avr_isp/pd.py
index 4b496e0..9ecc280 100644
--- a/decoders/avr_isp/pd.py
+++ b/decoders/avr_isp/pd.py
@@ -116,9 +116,18 @@ class Decoder(srd.Decoder):
self.xx, self.yy, self.zz, self.mm = 0, 0, 0, 0
def handle_cmd_chip_erase(self, cmd, ret):
- # TODO
+ # Chip erase (erases both flash an EEPROM).
+ # Upon successful chip erase, the lock bits will also be erased.
+ # The only way to end a Chip Erase cycle is to release RESET#.
self.putx([0, ['Chip erase']])
+ # TODO: Check/handle RESET#.
+
+ # Sanity check on reply.
+ bit = (ret[2] & (1 << 7)) >> 7
+ if ret[1] != 0xac or bit != 1 or ret[3] != cmd[2]:
+ self.putx([1, ['Warning: Unexpected bytes in reply!']])
+
def handle_cmd_read_fuse_bits(self, cmd, ret):
# Read fuse bits.
self.putx([0, ['Read fuse bits: 0x%02x' % ret[3]]])
--
cgit v1.2.3-70-g09d2