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This (unimplemented so far) option is not needed at all, since the
decoder will be able to detect 7/10 bit slave addresses automatically,
the user doesn't have to specify slave address sizes.
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The output format of the slave address is now a PD option. It can be
"shifted" or "unshifted", i.e. bit 0 (which contains a read/write
marker) is either shifted out or not, i.e., the slave address is
displayed as 8bit or 7bit number (or 11bit/10bit number for 10bit slave
addresses).
Data bytes (not address bytes) are always shown as 8bit values, of course.
Add annotation types for the individual I2C components such as
start conditions, stop conditions, ACK/NACK, address read/writes,
data read/writes and so on.
This fixes bug #151.
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Until now the I2C PD was basically ignoring the very first sample, and
using that as the initial 'oldscl'/'oldsda' value.
However, if your logic analyzers trigger on, say, SDA=low that will
result in a file where the first sample is really important since it
is the one which the PD will need to know that there's a falling edge
on SDA.
Thus, assume both SCL and SDA are high/1 when the PD starts. This is
a good assumption since both pins have pullups on them in practice
and are thus high/1 when the bus is idle.
Later on we might want to have config options to let the PD assume
other states of SDA/SCL initially.
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The Python module name is determined by the directory name (e.g. dcf77),
the *.py file names in that directory don't matter and can be kept
consistent.
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