diff options
| -rw-r--r-- | decoders/nrf24l01/pd.py | 4 | ||||
| -rw-r--r-- | decoders/nrf24l01/test/test.conf | 4 | ||||
| -rw-r--r-- | decoders/spi/pd.py | 4 | ||||
| -rw-r--r-- | decoders/spi/test/test.conf | 4 | ||||
| -rw-r--r-- | decoders/uart/pd.py | 5 |
5 files changed, 12 insertions, 9 deletions
diff --git a/decoders/nrf24l01/pd.py b/decoders/nrf24l01/pd.py index 410a847..99a7d6e 100644 --- a/decoders/nrf24l01/pd.py +++ b/decoders/nrf24l01/pd.py @@ -20,7 +20,7 @@ import sigrokdecode as srd -class MissingDataError(Exception): +class ChannelError(Exception): pass regs = { @@ -284,7 +284,7 @@ class Decoder(srd.Decoder): pos = (ss, es) if miso is None or mosi is None: - raise MissingDataError('Both MISO and MOSI pins required.') + raise ChannelError('Both MISO and MOSI pins required.') if self.first: self.first = False diff --git a/decoders/nrf24l01/test/test.conf b/decoders/nrf24l01/test/test.conf index 8b6d77b..986d30d 100644 --- a/decoders/nrf24l01/test/test.conf +++ b/decoders/nrf24l01/test/test.conf @@ -56,14 +56,14 @@ test no-mosi protocol-decoder nrf24l01 stack spi nrf24l01 input spi/nrf24l01/nrf24l01-test-no-command.sr - output nrf24l01 exception match MissingDataError + output nrf24l01 exception match ChannelError test no-miso protocol-decoder spi channel cs=0 channel clk=1 channel mosi=2 protocol-decoder nrf24l01 stack spi nrf24l01 input spi/nrf24l01/nrf24l01-test-no-command.sr - output nrf24l01 exception match MissingDataError + output nrf24l01 exception match ChannelError test unknown-command protocol-decoder spi channel cs=0 channel clk=1 channel mosi=2 channel miso=3 diff --git a/decoders/spi/pd.py b/decoders/spi/pd.py index 374d22b..97d5571 100644 --- a/decoders/spi/pd.py +++ b/decoders/spi/pd.py @@ -63,7 +63,7 @@ spi_mode = { class SamplerateError(Exception): pass -class MissingDataError(Exception): +class ChannelError(Exception): pass class Decoder(srd.Decoder): @@ -279,6 +279,6 @@ class Decoder(srd.Decoder): # Either MISO or MOSI (but not both) can be omitted. if not (self.have_miso or self.have_mosi): - raise MissingDataError('Either MISO or MOSI (or both) pins required.') + raise ChannelError('Either MISO or MOSI (or both) pins required.') self.find_clk_edge(miso, mosi, clk, cs) diff --git a/decoders/spi/test/test.conf b/decoders/spi/test/test.conf index 53edfeb..a74611d 100644 --- a/decoders/spi/test/test.conf +++ b/decoders/spi/test/test.conf @@ -36,8 +36,8 @@ test exception_samplerate input misc/no-samplerate.sr output spi exception match SamplerateError -test exception_missing_datapins +test exception_channel protocol-decoder spi channel cs=1 channel clk=0 input spi/spi-count-msb.sr - output spi exception match MissingDataError + output spi exception match ChannelError diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py index fef3aa5..d13a119 100644 --- a/decoders/uart/pd.py +++ b/decoders/uart/pd.py @@ -70,6 +70,9 @@ def parity_ok(parity_type, parity_bit, data, num_data_bits): class SamplerateError(Exception): pass +class ChannelError(Exception): + pass + class Decoder(srd.Decoder): api_version = 2 id = 'uart' @@ -336,7 +339,7 @@ class Decoder(srd.Decoder): # Either RX or TX (but not both) can be omitted. has_pin = [rx in (0, 1), tx in (0, 1)] if has_pin == [False, False]: - raise Exception('Either TX or RX (or both) pins required.') + raise ChannelError('Either TX or RX (or both) pins required.') # State machine. for rxtx in (RX, TX): |